CMOS DIGITAL ISOLATOR SERIES

The EVALSTISO62XV1 is available from ST and distributors for $25.00.

The STISO621 and STISO621W are both in production, priced from $0.97 for orders of 1000 pieces. High performance level is guaranteed from -40☌ to 125☌ temperature range. The STISO621W in the SO8 wide-body package with 8mm creepage and clearance has VIOTM of 6000V. In the SO8 narrow-body package with 4mm creepage and clearance, the STISO621 has VIOTM of 4800V. With a maximum working isolation voltage (VIOWM) of 1200Vpeak, and high impulse-withstand voltage (VIOTM), galvanic insulation integrity is maintained over time and during any system faults.

It combines the STISO621 to separate high voltage domains with ST’s high-accuracy STPMS2 metering front-end IC and specific firmware running on an STM32 microcontroller to compute three-phase metrology and power-quality data. The EVALSTPM-3PHISO reference design, specifically designed for three-phase isolated metering-systems use cases, is also available. The EVALSTISO62XV1 product evaluation board is available to help accelerate design completion in multiple applications. The design is tested in accordance with VDE0884-10 and UL 1577, the specifications typically applied to isolation devices for high-voltage applications. The STISO621 is suited to a wide range of industrial and consumer applications in power supplies, motor drives, meters, inverters, battery monitors, appliances, fieldbus isolators, size-critical multichannel isolation adapters, and general isolation throughout industrial-automation systems. Typical common-mode transient immunity (CMTI) of 65kV/µs protects the low-voltage side against high switching transients in harsh environments. Each has a wide voltage range, allowing level translation between 3.3V and 5.5V circuitry. The supply voltages to the two mutually galvanically isolated sides of the STISO621 are independent of each other. Schmitt-trigger inputs to each channel ensure high noise immunity.

With two independent unidirectional channels, the device performs as a UART interface handling data in both directions. The STISO621 transfers data between two isolated domains at up to 100Mbit/s, with pulse distortion below 3ns, leveraging ST’s 6kV thick-oxide galvanic-isolation technology.

CMOS DIGITAL ISOLATOR SERIES

My understanding of the cicuit is, that the 4k7 Resisors dampen the feedback signal and therefor the feedback should not be visible if the line is not driven at the outher side of the isolator.STMicroelectronics has begun volume production of the STISO621 dual-channel digital isolator, launching a new series of high-performance ICs for industrial applications and general optocoupler replacement. Here is a scope image of the Data line after the isolation IC: Obviously this is due to the chain of the two isolator channels that feed back into the signal with a delay. The bidirectional Data signal however is severely degraded. The unidirectional CLK signal arrives in quite a good condition after the isolator. The digital isolation technology provides significant advantages over the older optocoupler because of the tight control of skew between channels and other distortions in the signal chain. I have implemented the design on a prototype pcb. But digital isolators, built in standard CMOS technology, have very stable timing characteristic across product lifetime. It uses an SI8662 6-ch, digital Isolation IC. I have found a circuit that claims to be able to do this for a generic ARM Cortex. Specifically I would like to isolate the 2-wire debug interface of an STM32 and the STlinkV2. I am now faced with isolating a bidirectional digital signal line. I have used digital Isolators before in unidirectional Designs.

Cmos digital isolator